Priority Encoder

Priority Encoder (4:2 bits)

Circuit Description

A 4-bit priority encoder (also sometimes called a priority decoder). This circuit basically converts the 4-bit input into a binary representation. If the input n is active, all lower inputs (n-1 .. 0) are ignored:

x3 x2 x1 x0  y1 y0
------------------
1  X  X  X   1  1
0  1  X  X   1  0
0  0  1  X   0  1
0  0  0  X   0  0

The circuit operation is simple. Each output is driven by an OR-gate which is connected to the NAND-INV outputs of the corresponding input lines. The NAND gate of each stages receives its input bit, as well as the NAND gate outputs of all higher priority stages. This structure implies that an active input on stage n effectively disables all lower stages n-1 .. 0.

Note that the circuit function as specified here does not depend at all on the least significand input bit.

A common use of priority encoders is for interrupt controllers, to select the most critical out of multiple interrupt requests. Due to electrical reasons (open collector outputs), priority encoders with active-low inputs are also often used in practice.

Priority Encoder (8:3 bits)

Circuit Description

An 8-bit priority encoder. This circuit basically converts a one-hot encoding into a binary representation. If input n is active, all lower inputs (n-1 .. 0) are ignored. Please read the description of the 4:2 encoder for an explanation.

x7 x6 x5 x4 x3 x2 x1 x0   y2 y1 y0
----------------------------------
1  X  X  X  X  X  X  X    1  1  1
0  1  X  X  X  X  X  X    1  1  0
0  0  1  X  X  X  X  X    1  0  1
0  0  0  1  X  X  X  X    1  0  0
0  0  0  0  1  X  X  X    0  1  1
0  0  0  0  0  1  X  X    0  1  0
0  0  0  0  0  0  1  X    0  0  1
0  0  0  0  0  0  0  X    0  0  0


source : http://tams-www.informatik.uni-hamburg.de